Synfora provides software tools, services and IP that accelerate the design of systems-on-chips (SoCs). The patented PICO technology enables designers to effortlessly target low power designs, eliminates months of manual design effort by automatically generating synthesizable RTL and increase reliability by significantly enhanced verification methodologies including automatic generation of RTL testbench and SystemC models. The tool allows user full control over critical design choices that affect performance, speed and area.

PICO Key Benefits

Optimal Area:
Anybody in consumer space is going to be concerned about area and, intuitively, one expects a human to be able to come up with a better area than a tool. This is true only to the extent that the designer has the time and experience to find the best implementation. PICO gives you time to experiment and tune the algorithm for area.

Design Reuse and Future Proofing:
This is a version of design re-use but it points out that work spent in tuning an algorithm is going to be rewarded over multiple designs to different processes and performance points. Increasingly designers will value their algorithmic IP and protecting that investment by enabling rapid re-deployment will be highly valued.

Time to market:
Getting to market quickly is increasingly important as complexity rises and design teams are consistently late to market. PICO enables you to get to market on time or early by delivering reliable schedules driven from elimination of manual effort, efficient and thorough verification, and first pass timing closure.

Low power design:
The ability to try different implementation alternatives (what is run on the processor and what is run in dedicated hardware), different clock frequencies and different voltage levels is critical to find the lowest power alternative. Nobody else gives such a complete and automated solution based on the ability to synthesize the complete engine.